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NXP Semiconductors /LPC43xx /ETHERNET /MAC_DEBUG

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Interpret as MAC_DEBUG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RXIDLESTAT)RXIDLESTAT 0FIFOSTAT0 0 (RESERVED)RESERVED 0 (RXFIFOSTAT1)RXFIFOSTAT1 0RXFIFOSTAT 0 (RESERVED)RESERVED 0RXFIFOLVL 0 (RESERVED)RESERVED0 (TXIDLESTAT)TXIDLESTAT 0TXSTAT 0 (PAUSE)PAUSE 0TXFIFOSTAT 0 (TXFIFOSTAT1)TXFIFOSTAT1 0 (RESERVED)RESERVED 0 (TXFIFOLVL)TXFIFOLVL 0 (TXFIFOFULL)TXFIFOFULL 0 (RESERVED)RESERVED

Description

Debug register

Fields

RXIDLESTAT

When high, it indicates that the MAC MII receive protocol engine is actively receiving data and not in IDLE state.
FIFOSTAT0

When high, it indicates the active state of the small FIFO Read and Write controllers respectively of the MAC receive Frame Controller module.
RESERVED

Reserved
RXFIFOSTAT1

When high, it indicates that the MTL RxFIFO Write Controller is active and transferring a received frame to the FIFO.
RXFIFOSTAT

State of the RxFIFO read Controller: 00 = idle state 01 = reading frame data 10 = reading frame status (or Time stamp) 11 = flushing the frame data and status
RESERVED

Reserved
RXFIFOLVL

Status of the RxFIFO Fill-level 00 = RxFIFO Empty 01 = RxFIFO fill-level below flow-control de-activate threshold 10 = RxFIFO fill-level above flow-control activate threshold 11 = RxFIFO Full
RESERVED

Reserved
TXIDLESTAT

When high, it indicates that the MAC MII transmit protocol engine is actively transmitting data and not in IDLE state.
TXSTAT

State of the MAC Transmit Frame Controller module: 00 = idle 01 = Waiting for Status of previous frame or IFG/backoff period to be over 10 = Generating and transmitting a PAUSE control frame (in full duplex mode) 11 = Transferring input frame for transmission
PAUSE

When high, it indicates that the MAC transmitter is in PAUSE condition (in full-duplex only) and hence will not schedule any frame for transmission.
TXFIFOSTAT

State of the TxFIFO read Controller 00 = idle state 01 = READ state (transferring data to MAC transmitter) 10 = Waiting for TxStatus from MAC transmitter 11 = Writing the received TxStatus or flushing the TxFIFO
TXFIFOSTAT1

When high, it indicates that the TxFIFO Write Controller is active and transferring data to the TxFIFO.
RESERVED

Reserved
TXFIFOLVL

When high, it indicates that the TxFIFO is not empty and has some data left for transmission.
TXFIFOFULL

When high, it indicates that the TxStatus FIFO is full and hence the controller will not be accepting any more frames for transmission.
RESERVED

Reserved

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data